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Nuvoton NPCM7XX Pin Controllers
The Nuvoton BMC NPCM7XX Pin Controller multi-function routed through
the multiplexing block, Each pin supports GPIO functionality (GPIOx)
and multiple functions that directly connect the pin to different
hardware blocks.
Required properties:
- #address-cells : should be 1.
- #size-cells : should be 1.
- compatible : "nuvoton,npcm750-pinctrl" for Poleg NPCM7XX.
- ranges : defines mapping ranges between pin controller node (parent)
to GPIO bank node (children).
=== GPIO Bank Subnode ===
The NPCM7XX has 8 GPIO Banks each GPIO bank supports 32 GPIO.
Required GPIO Bank subnode-properties:
- reg : specifies physical base address and size of the GPIO
bank registers.
- gpio-controller : Marks the device node as a GPIO controller.
- #gpio-cells : Must be <2>. The first cell is the gpio pin number
and the second cell is used for optional parameters.
- interrupts : contain the GPIO bank interrupt with flags for falling edge.
- gpio-ranges : defines the range of pins managed by the GPIO bank controller.
For example, GPIO bank subnodes like the following:
gpio0: gpio@f0010000 {
#gpio-cells = <2>;
reg = <0x0 0x80>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 32>;
=== Pin Mux Subnode ===
- pin: A string containing the name of the pin
An array of strings, each string containing the name of a pin.
These pin are used for selecting pin configuration.
The following are the list of pins available:
"GPIO52/nDCD2", "GPO53/nDTR2_BOUT2/STRAP1", "GPIO54/nDSR2", "GPIO55/nRI2",
"GPIO80/PWM0", "GPIO81/PWM1", "GPIO82/PWM2", "GPIO83/PWM3", "GPIO84/R2TXD0",
"GPIO101/RG1TXCTL", "GPIO102/RG1RXD0", "GPIO103/RG1RXD1", "GPIO104/RG1RXD2",
"GPIO135/SMB11SDA", "GPIO136/SD1DT0", "GPIO137/SD1DT1", "GPIO138/SD1DT2",
"GPIO139/SD1DT3", "GPIO140/SD1CLK", "GPIO141/SD1WP", "GPIO142/SD1CMD",
"GPIO143/SD1CD/SD1PWR", "GPIO144/PWM4", "GPIO145/PWM5", "GPIO146/PWM6",
"GPIO147/PWM7", "GPIO148/MMCDT4", "GPIO149/MMCDT5", "GPIO150/MMCDT6",
"GPIO179/R1TXD1", "GPIO180/R1TXEN", "GPIO181/R1RXD0", "GPIO182/R1RXD1",
"GPIO183/SPI3CK", "GPO184/SPI3D0/STRAP9", "GPO185/SPI3D1/STRAP10",
"GPIO186/nSPI3CS0", "GPIO187/nSPI3CS1", "GPIO188/SPI3D2/nSPI3CS2",
"GPIO189/SPI3D3/nSPI3CS3", "GPIO190/nPRD_SMI", "GPIO191", "GPIO192", "GPIO193/R1CRSDV",
"GPIO219/nWDO2", "GPIO220/SMB12SCL", "GPIO221/SMB12SDA", "GPIO222/SMB13SCL",
Optional Properties:
bias-disable, bias-pull-down, bias-pull-up, input-enable,
input-disable, output-high, output-low, drive-push-pull,
drive-open-drain, input-debounce, slew-rate, drive-strength
slew-rate valid arguments are:
<0> - slow
<1> - fast
drive-strength valid arguments are:
<2> - 2mA
<4> - 4mA
<8> - 8mA
<12> - 12mA
<16> - 16mA
<24> - 24mA
For example, pinctrl might have pinmux subnodes like the following:
gpio0_iox1d1_pin: gpio0-iox1d1-pin {
pins = "GPIO0/IOX1DI";
gpio0_iox1ck_pin: gpio0-iox1ck-pin {
pins = "GPIO2/IOX1CK";
=== Pin Group Subnode ===
Required pin group subnode-properties:
- groups : A string containing the name of the group to mux.
- function: A string containing the name of the function to mux to the
The following are the list of the available groups and functions :
smb0, smb0b, smb0c, smb0d, smb0den, smb1, smb1b, smb1c, smb1d,
smb2, smb2b, smb2c, smb2d, smb3, smb3b, smb3c, smb3d, smb4, smb4b,
smb4c, smb4d, smb4den, smb5, smb5b, smb5c, smb5d, ga20kbc, smb6,
smb7, smb8, smb9, smb10, smb11, smb12, smb13, smb14, smb15, fanin0,
fanin1, fanin2, fanin3, fanin4, fanin5, fanin6, fanin7, fanin8,
fanin9, fanin10, fanin11 fanin12 fanin13, fanin14, fanin15, faninx,
pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, rg1, rg1mdio, rg2,
rg2mdio, ddr, uart1, uart2, bmcuart0a, bmcuart0b, bmcuart1, iox1,
iox2, ioxh, gspi, mmc, mmcwp, mmccd, mmcrst, mmc8, r1, r1err, r1md,
r2, r2err, r2md, sd1, sd1pwr, wdog1, wdog2, scipme, sci, serirq,
jtag2, spix, spixcs1, pspi1, pspi2, ddc, clkreq, clkout, spi3, spi3cs1,
spi3quad, spi3cs2, spi3cs3, spi0cs1, lpc, lpcclk, espi, lkgpo0, lkgpo1,
lkgpo2, nprd_smi
For example, pinctrl might have group subnodes like the following:
r1err_pins: r1err-pins {
groups = "r1err";
function = "r1err";
r1md_pins: r1md-pins {
groups = "r1md";
function = "r1md";
r1_pins: r1-pins {
groups = "r1";
function = "r1";
pinctrl: pinctrl@f0800000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "nuvoton,npcm750-pinctrl";
ranges = <0 0xf0010000 0x8000>;
gpio0: gpio@f0010000 {
#gpio-cells = <2>;
reg = <0x0 0x80>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 32>;
gpio7: gpio@f0017000 {
#gpio-cells = <2>;
reg = <0x7000 0x80>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 224 32>;
gpio0_iox1d1_pin: gpio0-iox1d1-pin {
pins = "GPIO0/IOX1DI";
iox1_pins: iox1-pins {
groups = "iox1";
function = "iox1";
iox2_pins: iox2-pins {
groups = "iox2";
function = "iox2";
clkreq_pins: clkreq-pins {
groups = "clkreq";
function = "clkreq";