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Cavium SuperSpeed DWC3 USB SoC controller
Required properties:
- compatible: Should contain "cavium,octeon-7130-usb-uctl"
Required child node:
A child node must exist to represent the core DWC3 IP block. The name of
the node is not important. The content of the node is defined in dwc3.txt.
Example device node:
uctl@1180069000000 {
compatible = "cavium,octeon-7130-usb-uctl";
reg = <0x00011800 0x69000000 0x00000000 0x00000100>;
#address-cells = <0x00000002>;
#size-cells = <0x00000002>;
refclk-frequency = <0x05f5e100>;
refclk-type-ss = "dlmc_ref_clk0";
refclk-type-hs = "dlmc_ref_clk0";
power = <0x00000002 0x00000002 0x00000001>;
xhci@1690000000000 {
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
reg = <0x00016900 0x00000000 0x00000010 0x00000000>;
interrupt-parent = <0x00000010>;
interrupts = <0x00000009 0x00000004>;